Senior IC design Engineer

职位：POSITION NO.: RD-STB-Digital

1.  Module-level RTLimplementation base on design specification;

2.  Module-level architecturedefinition and implementation base on DSP materials (C/C++ or Matlab)

3.  Simulation/Verification at bothmodule level and system level;

4.  chip-level synthesis and timingclosing;

5.  Writing design spec and report;

6.  FPGA/silicon debug on relatedmodules.

JOBQUALIFICATIONS:

1.  Bachelor degree or Master degreein ASIC Design Relevant;

2.  >5 years of digital designexperience;

3.  Solid understanding of state-of-arttape-out flow and methodology from RTL to GDS; Strong hands-on experience inusing widely-adopted EDA tools for netlist generation, formal check and timingfix; Broad knowledge base and good understanding of timing issues, P&R flowand challenges, DFT, low power design, signal integrity, test and packaging,handling of mixed signal, post-layout ECO, etc;

4.  Familiar with C/C++ and Matlab andsome script languages

5.  Understanding the fundamentals ofbasic digital signal processing

6.  Relevant experience with STB,especially with FEC and DDR is better.